15.12 Irda Operation; Flow Of Irda Setting; Transmission - Renesas RZ/A Series User Manual

RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group

15.12 IrDA Operation

15.12.1

Flow of IrDA Setting

To set the operation of the IrDA module, follow the procedure below.
1. Make the general-purpose I/O port settings.
2. Set the IRCR register.
3. Set the relevant registers of the SCI.
15.12.2

Transmission

In transmission with the IrDA function enabled, serial data from the TXD pin for the SCI (UART frame data) are
converted to IR frames (see Figure 15.41). When the IRTXINV bit is 0 and the value of the serial data is 0, a high-level
pulse is output to the SCI_TXD0 pin for three sixteenths of one-bit period (initial value). The width of the high-level
pulse can be changed by the IRCKS[2:0] bits in the IRCR register. The IrDA standard stipulates that the high-level pulse
width is at least 1.41 μs and no greater than ((3/16 + 2.5%) × bit rate) or ((3/16 × bit rate) + 1.08) μs. When P1φ is 66.67
MHz, the width of the high-level pulse can be set from 1.41 μs to 1.92 μs. When the value of a bit of the serial data is 1,
no pulse is output.
Start bit
0
Transmission
Start bit
0
Bit
cycle
Figure 15.41 Example of IrDA Transmission and Reception
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
UART frame
Data
1 0 1 0
IR frame
Data
1 0 1 0
Stop bit
0 1 1 0
Reception
Stop bit
0 1 1 0
The pulse width is from 1.41 μs to (3/16 of bit cycle + 1.08) μs.
15. Serial Communications Interface
1
1
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