Table 3-6. Parity Type Settings (Bits 5 To 3 Of Lcr); Table 3-7. Settings For Transmission/Reception Data Length (Bits 1 And 0 Of Lcr) - Renesas EMMA Mobile 1 User Manual

Name R/W
STB * R/W
WLS[1:0] * R/W
* If a register value is changed during operation, normal operation is not guaranteed. In this case, initialize the
register.

Table 3-7. Settings for Transmission/Reception Data Length (Bits 1 and 0 of LCR)

22
CHAPTER 3 REGISTERS
Bit After Reset
2 0 Specifies the number of stop bits to add to data transferred via serial
transmission.
0: 1 bit
1: 2 bits
Only the first stop bit is checked on the reception side, regardless of this
setting.
1:0 0 Specifies the length of data transferred via serial transmission and reception.
00: 5 bits
01: 6 bits
10: 7 bits
11: 8 bits

Table 3-6. Parity Type Settings (Bits 5 to 3 of LCR)

Bits 5 to 3 of LCR
xx0
001
011
101
111
xx: Don't Care
WLS[1:0] of LCR
00
01
10
11
User's Manual S19262EJ3V0UM
Function
Parity Type
No parity
Odd parity
Even parity
Stick High (fixed to "1")
Stick Low (fixed to "0")
Data Length
5 bits
6 bits
7 bits
8 bits
(2/2)