ST STM32L4+ Series Reference Manual page 1202

Advanced-control timers (TIM1/TIM8)
Timerclock = CK_CNT
Counter register
Counter overflow
Update event (UEV)
Update interrupt flag
Timerclock = CK_CNT
Counter register
Counter overflow
Update event (UEV)
Update interrupt flag
1202/2301
Figure 286. Counter timing diagram, internal clock divided by 1
CK_PSC
CNT_EN
31
(UIF)
Figure 287. Counter timing diagram, internal clock divided by 2
CK_PSC
CNT_EN
0034
(UIF)
RM0432 Rev 6
32 34 35 36 00
33
0036
0035
01 02
03 04 05
0000 0002
0001
RM0432
06 07
MS31078V2
0003
MS31079V2