ST STM32L4+ Series Reference Manual page 1217

RM0432
Counter clock = CK_CNT = CK_PSC
External clock source mode 2
This mode is selected by writing ECE=1 in the TIMx_SMCR register.
The counter can count at each rising or falling edge on the external trigger input ETR.
The Figure 310
ETR
ETR pin
TIMx_SMCR
For example, to configure the upcounter to count each 2 rising edges on ETR, use the
following procedure:
Figure 309. Control circuit in external clock mode 1
TI2
CNT_EN
Counter register
TIF
gives an overview of the external trigger input block.
Figure 310. External trigger input block
0
Divider
/1, /2, /4, /8
1
ETP ETPS[1:0]
TIMx_SMCR
Advanced-control timers (TIM1/TIM8)
34
Write TIF=0
or
ETRP
Filter
downcounter
f
DTS
ETF[3:0]
(internal clock)
TIMx_SMCR
RM0432 Rev 6
35
TI2F or
TI1F or
Encoder
mode
TRGI External clock
mode 1
External clock
ETRF
mode 2
CK_INT
Internal clock
mode
ECE SMS[2:0]
TIMx_SMCR
36
MS31087V2
CK_PSC
MS33116V1
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1302