Figure 14.37 Port Pin States During Mode Transition (Internal Clock, Asynchronous Transmission); Figure 14.38 Port Pin States During Mode Transition (Internal Clock, Synchronous Transmission) - Renesas H8S/2368 Series Hardware Manual

TE bit
SCK output pin
TxD output pin
Port input/output
Port
Figure 14.37 Port Pin States during Mode Transition
TE bit
SCK output pin
TxD output pin
Port input/output
Port
Note: * Initialized by software standby.
Figure 14.38 Port Pin States during Mode Transition
Start of transmission
High output Start
SCI TxD output
(Internal Clock, Asynchronous Transmission)
Start of transmission
Marking output
SCI TxD output
(Internal Clock, Synchronous Transmission)
Transition
End of to software
transmission standby
Stop Port input/output
Transition
End of to software
transmission standby
Port input/output
Last TxD bit held
Port input/output
Rev. 2.00, 05/03, page 587 of 820
Exit from
software
standby
Port input/output
High output
SCI TxD
Port
output
Exit from
software
standby
High output*
SCI TxD
Port
output