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2.3.2 Operation of Serial I/O (transmission in clock-synchronous serial I/O mode)
In transmitting data in clock-synchronous serial I/O mode, choose functions from those listed in Table
2.3.1. Operations of the circled items are described below. Figure 2.3.5 shows the operation timing, and
Figures 2.3.6 and 2.3.7 show the set-up procedures.
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Operation
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Table 2.3.1. Choosed functions
Item
Transfer clock
O
Internal clock (f
source
External clock (CLKi pin)
CTS function
O
CTS function enabled
CTS function disabled
Output transmission data at
CLK polarity
O
the falling edge of the
transfer clock
Output transmission data at
the rising edge of the
transfer clock
(1) Setting the transmit enable bit to "1" and writing transmission data to the UARTi transmit
buffer register makes data transmissible status ready.
________
(2) When input to the CTSi pin goes to "L" level, transmission starts (the CTSi pin must be
controlled on the reception side).
(3) In synchronization with the first falling edge of the transfer clock, transmission data held in the
UARTi transmit buffer register is transmitted to the UARTi transmit register. At this time, the
UARTi transmit interrupt request bit goes to "1". Also, the first bit of the transmission data is
transmitted from the TxDi pin. Then the data is transmitted bit by bit from the lower order in
synchronization with the falling edges.
(4) When transmission of 1-byte data is completed, the transmit register empty flag goes to "1",
which indicates that transmission is completed. The transfer clock stops at "H" level.
(5) If the next transmission data is set in the UARTi transmit buffer register while transmission is
in progress (before the eighth bit has been transmitted), the data is transmitted in succession.
page 45 of 354
Set-up
Item
/ f
/ f
)
Transfer clock
1
8
32
Transmission
interrupt factor
Data logic select
function
T
D, R
D I/O
X
X
polarity reverse bit
2. Clock-Synchronous Serial I/O
Set-up
O
LSB first
MSB first
Transmission buffer empty
O
Transmission complete
O
No reverse
Reverse
O
No reverse
Reverse
_______
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