Operation In Clock Synchronous Mode - Renesas RZ/A Series User Manual

RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
14.4.3

Operation in Clock Synchronous Mode

In clock synchronous mode, data is transmitted and received in synchronization with clock pulses. This mode is suitable
for high-speed serial communication.
The transmitter and receiver in this module are independent, so full-duplex communication is possible while sharing the
same clock. The transmitter and receiver are also 16-stage FIFO buffered, so continuous transmitting or receiving is
possible by reading or writing data while transmitting or receiving is in progress.
Figure 14.11 shows the general format in clock synchronous serial communication.
*
Serial clock
Serial data Don't care
Note: * High except in continuous transfer
Figure 14.11 Data Format in Clock Synchronous Communication
In clock synchronous serial communication, each data bit is output on the communication line from one falling edge of
the serial clock to the next. Data is guaranteed valid at the rising edge of the serial clock.
In each character, the serial data bits are transmitted in order from the LSB (first) to the MSB (last). After output of the
MSB, the communication line remains in the state of the MSB.
In clock synchronous mode, data is received in synchronization with the rising edge of the synchronous clock.
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
One unit of transfer data (character or frame)
LSB
Bit 0 Bit 1 Bit 2
14. Serial Communication Interface with FIFO
Bit 3 Bit 4 Bit 5
*
MSB
Bit 6 Bit 7 Don't care
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