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12.2.2
Timer Control/Status Register (TCSR)
TCSR is an 8-bit readable and writable register. Its functions include selecting the timer mode and
clock source.
Bit
7
OVF
Initial value
0
Read/Write
R/(W)
Overflow flag
Status flag indicating overflow
Notes: TCSR is write-protected by a password. For details see section 12.2.4, Notes on Register
Access.
* Only 0 can be written, to clear the flag.
Bits 7 to 5 are initialized to 0 by a reset and in standby mode. Bits 2 to 0 are initialized to 0 by a
reset. In software standby mode bits 2 to 0 are not initialized, but retain their previous values.
6
5
WT/IT
TME
0
0
*
R/W
R/W
Timer enable
Selects whether TCNT runs or halts
Timer mode select
Selects the mode
Section 12 Watchdog Timer
4
3
2
CKS2
1
1
0
R/W
Clock select
These bits select the
TCNT clock source
Reserved bits
Rev. 4.00 Jan 26, 2006 page 465 of 938
1
0
CKS1
CKS0
0
0
R/W
R/W
REJ09B0276-0400
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