Table of Contents
Advertisement
Section 6 Bus Controller
6.2
Register Descriptions
6.2.1
Bus Width Control Register (ABWCR)
ABWCR is an 8-bit readable/writable register that selects 8-bit or 16-bit access for each area.
Bit
Modes
Initial value
1, 3, 5, 6,
and 7
Read/Write
Modes
Initial value
2 and 4
Read/Write
When ABWCR contains H'FF (selecting 8-bit access for all areas), the chip operates in 8-bit bus
mode: the upper data bus (D
bit is cleared to 0 in ABWCR, the chip operates in 16-bit bus mode with a 16-bit data bus (D
D
). In modes 1, 3, 5, 6, and 7, ABWCR is initialized to H'FF by a reset and in hardware standby
0
mode. In modes 2 and 4, ABWCR is initialized to H'00 by a reset and in hardware standby mode.
It is not initialized in software standby mode.
Bits 7 to 0—Area 7 to 0 Bus Width Control (ABW7 to ABW0): These bits select 8-bit access
or 16-bit access for the corresponding areas.
Bits 7 to 0
ABW7 to ABW0
Description
0
Areas 7 to 0 are 16-bit access areas
1
Areas 7 to 0 are 8-bit access areas
ABWCR specifies the data bus width of external memory areas. The data bus width of on-chip
memory and registers is fixed, and does not depend on ABWCR settings. These settings are
therefore meaningless in the single-chip modes (modes 6 and 7).
Rev. 4.00 Jan 26, 2006 page 124 of 938
REJ09B0276-0400
7
6
ABW7
ABW6
ABW5
1
1
R/W
R/W
R/W
0
0
R/W
R/W
R/W
to D
) is valid, and port 4 is an input/output port. When at least one
15
8
5
4
3
ABW4
ABW3
1
1
1
R/W
R/W
0
0
0
R/W
R/W
2
1
ABW2
ABW1
ABW0
1
1
R/W
R/W
R/W
0
0
R/W
R/W
R/W
0
1
0
to
15
Advertisement
Table of Contents
