Renesas H8/3067 Series User Manual page 190

Section 6 Bus Controller
Table 6.5 Settings of Bits DRAS2 to DRAS0 and Corresponding DRAM Space (RAS
Output Pin)
DRAS2 DRAS1 DRAS0 Area 5
0 0 0
1
1 0
1
1 0 0
1
1 0
1
Note: * A single CS pin serves as a common RAS output pin for a number of areas. Unused CS
n
pins can be used as input/output ports.
Rev. 4.00 Jan 26, 2006 page 166 of 938
REJ09B0276-0400
Area 4
Normal space Normal space
Normal space Normal space
Normal space Normal space
Normal space Normal space
Normal space DRAM space
(CS
DRAM space DRAM space
(CS ) (CS
5
DRAM space (CS )*
4
DRAM space (CS )*
2
Area 3
Normal space
Normal space
DRAM space
(CS )
3
DRAM space (CS
DRAM space
) (CS )
4 3
DRAM space
) (CS )
4 3
DRAM space (CS
RAS RAS RAS
Area 2
Normal space
DRAM space
(CS )
2
DRAM space
(CS )
2
)*
2
DRAM space
(CS )
2
DRAM space
(CS )
2
)*
2
n