Renesas H8/3067 Series User Manual page 790

Renesas 16-bit single-chip microcomputer
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Appendix A Instruction Set
7. System control instructions
Mnemonic
TRAPA #x:2
RTE
SLEEP
LDC #xx:8, CCR
LDC Rs, CCR
LDC @ERs, CCR
W
LDC @(d:16, ERs),
W
CCR
LDC @(d:24, ERs),
W
CCR
LDC @ERs+, CCR
W
LDC @aa:16, CCR
W
LDC @aa:24, CCR
W
STC CCR, Rd
STC CCR, @ERd
W
STC CCR, @(d:16,
W
ERd)
STC CCR, @(d:24,
W
ERd)
STC CCR, @ÐERd
W
STC CCR, @aa:16
W
STC CCR, @aa:24
W
ANDC #xx:8, CCR
ORC #xx:8, CCR
XORC #xx:8, CCR
NOP
Rev. 4.00 Jan 26, 2006 page 766 of 938
REJ09B0276-0400
Addressing Mode and
Instruction Length (bytes)
B
2
B
2
4
6
10
4
6
8
B
2
4
6
10
4
6
8
B
2
B
2
B
2
Operation
PC → @ÐSP
2
CCR → @ÐSP
<vector> → PC
CCR ← @SP+
PC ← @SP+
Transition to powerdown
state
#xx:8 → CCR
Rs8 → CCR
@ERs → CCR
@(d:16, ERs) → CCR
@(d:24, ERs) → CCR
@ERs → CCR
ERs32+2 → ERs32
@aa:16 → CCR
@aa:24 → CCR
CCR → Rd8
CCR → @ERd
CCR → @(d:16, ERd)
CCR → @(d:24, ERd)
ERd32Ð2 → ERd32
CCR → @ERd
CCR → @aa:16
CCR → @aa:24
CCR∧#xx:8 → CCR
CCR∨#xx:8 → CCR
CCR⊕#xx:8 → CCR
PC ← PC+2
2
No. of
States*
Condition Code
I
H N Z
V C
1     
14 16
10
     
2
2
2
6
8
12
8
8
10
     
2
     
6
     
8
     
12
     
8
     
8
     
10
2
2
2
     
2
1

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