Renesas H8/3067 Series User Manual page 686

Section 18 ROM
φ
t
OSC1
V
CC
FWE
MD to MD
2 0
RES
SWE bit
Mode switching *
Flash memory access disabled time
(x: Wait time after SWE setting)
Flash memory reprogammable period
(Flash memory program execution and data read, other than verify, are disabled.)
Notes: 1. In transition to the boot mode and transition from the boot mode to another mode,
mode switching via RES input is necessary.
During this switching period (period during which a low level is input to the RES pin),
the state of the address dual port and bus control output signals (AS,RD,WR) changes.
Therefore, do not use these pins as output signals during this switching period.
2.
When making a transition from the boot mode to another mode, the mode programming
setup time t
3.
See 21.2.6 Flash Memory Characteristics.
(Example: Boot mode → → → → User mode ↔
Rev. 4.00 Jan 26, 2006 page 662 of 938
REJ09B0276-0400
Programming and
Wait time: x erase possible
t
MDS
t
MDS
t
SWE set
SWE clear
1 Boot mode
Mode
switching *
3
*
relative to the RES clear timing is necessary.
MDS
Figure 18.27 Mode Transition Timing
Programming
and
Wait
erase
Wait time: x possible time: x
min 0µs
2
*
t
MDS
RESW
User User program mode
1
mode
↔ User program mode)
↔ ↔
Programming
Programming and Wait
erase possible time: x
User
User
program
mode
mode
and
erase
possible