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Before Execution of BCLR Instruction
P4
7
Input/output
Input
DDR
0
Execution of BCLR Instruction
BCLR #0, @P4DDR ;Clear bit 0 in data direction register
After Execution of BCLR Instruction
P4
7
Input/output
Output
DDR
1
Explanation: To execute the BCLR instruction, the CPU begins by reading P4DDR. Since
P4DDR is a write-only register, it is read as H'FF, even though its true value is H'3F.
Next the CPU clears bit 0 of the read data, changing the value to H'FE.
Finally, the CPU writes this value (H'FE) back to P4DDR to complete the BCLR instruction.
As a result, P4
DDR is cleared to 0, making P4
0
are set to 1, making P4
The BCLR instruction can be used to clear flags in the on-chip registers to 0. In an interrupt-
handling routine, for example, if it is known that the flag is set to 1, it is not necessary to read the
flag ahead of time.
P4
P4
6
5
Input
Output
0
1
P4
P4
6
5
Output
Output
1
1
and P4
output pins.
7
6
P4
P4
P4
4
3
Output
Output
Output
1
1
1
P4
P4
P4
4
3
Output
Output
Output
1
1
1
an input pin. In addition, P4
0
Rev. 4.00 Jan 26, 2006 page 47 of 938
Section 2 CPU
P4
P4
2
1
0
Output
Output
1
1
P4
P4
2
1
0
Output
Input
1
0
DDR and P4
7
6
REJ09B0276-0400
DDR
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