Upper-byte read
CPU
Bus interface
(H'AA)
Lower-byte read
CPU
Bus interface
(H'40)
Figure 15.2 A/D Data Register Access Operation (Reading H'AA40)
TEMP
(H'40)
ADDRnH
ADDRnL
(H'AA)
(H'40)
TEMP
(H'40)
ADDRnH
ADDRnL
(H'AA)
(H'40)
Rev. 4.00 Jan 26, 2006 page 579 of 938
Section 15 A/D Converter
Module data bus
(n = A to D)
Module data bus
(n = A to D)
REJ09B0276-0400