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Appendix A Instruction Set
Mnemonic
INC.L #1, ERd
INC.L #2, ERd
DAA Rd
SUB.B Rs, Rd
SUB.W #xx:16, Rd
SUB.W Rs, Rd
SUB.L #xx:32, ERd
SUB.L ERs, ERd
SUBX.B #xx:8, Rd
SUBX.B Rs, Rd
SUBS.L #1, ERd
SUBS.L #2, ERd
SUBS.L #4, ERd
DEC.B Rd
DEC.W #1, Rd
DEC.W #2, Rd
DEC.L #1, ERd
DEC.L #2, ERd
DAS.Rd
MULXU. B Rs, Rd
MULXU. W Rs, ERd
MULXS. B Rs, Rd
MULXS. W Rs, ERd
DIVXU. B Rs, Rd
Rev. 4.00 Jan 26, 2006 page 758 of 938
REJ09B0276-0400
Addressing Mode and
Instruction Length (bytes)
L
2
L
2
B
2
B
2
W
4
W
2
L
6
L
2
B
2
B
2
L
2
L
2
L
2
B
2
W
2
W
2
L
2
L
2
B
2
B
2
W
2
B
4
W
4
B
2
Operation
I
ERd32+1 → ERd32
ERd32+2 → ERd32
*
Rd8 decimal adjust
→ Rd8
Rd8−Rs8 → Rd8
Rd16−#xx:16 → Rd16
(1)
Rd16−Rs16 → Rd16
(1)
(2)
ERd32−#xx:32
→ ERd32
(2)
ERd32−ERs32
→ ERd32
Rd8−#xx:8ÐC → Rd8
Rd8−Rs8ÐC → Rd8
ERd32−1 → ERd32
ERd32−2 → ERd32
ERd32−4 → ERd32
Rd8−1 → Rd8
Rd16−1 → Rd16
Rd16−2 → Rd16
ERd32−1 → ERd32
ERd32−2 → ERd32
*
Rd8 decimal adjust
→ Rd8
Rd8 × Rs8 → Rd16
(unsigned multiplication)
Rd16 × Rs16 → ERd32
(unsigned multiplication)
Rd8 × Rs8 → Rd16
(signed multiplication)
Rd16 × Rs16 → ERd32
(signed multiplication)
Rd16 ÷ Rs8 → Rd16
(6) (7)
(RdH: remainder, RdL:
quotient)
(unsigned division)
No. of
1
States*
Condition Code
H N Z
V C
2
2
*
2
2
4
2
6
2
(3)
2
(3)
2
2
2
2
2
2
2
2
2
*
2
14
22
16
24
14
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