Renesas H8/3067 Series User Manual page 412

Renesas 16-bit single-chip microcomputer
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Section 9 16-Bit Timer
Contention between TCNT Write and Overflow or Underflow: If an overflow occurs in the T
state of a TCNT write cycle, writing takes priority and the counter is not incremented. OVF is
set to 1.The same holds for underflow. See figure 9.41.
φ
Address bus
Internal write signal
TCNT input clock
Overflow signal
TCNT
OVF
Figure 9.41 Contention between TCNT Write and Overflow
Rev. 4.00 Jan 26, 2006 page 388 of 938
REJ09B0276-0400
TCNT write cycle
T
T
1
2
TCNT address
H'FFFF
TCNT write data
T
3
M
3

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