Section 7 DMA Controller
Start
(DTE = DTME = 1)
Transfer requested?
Get bus
Read from MARA address
MARA = MARA + 1
Write to MARB address
MARB = MARB + 1
ETCRAH = ETCRAH ÐÊ1
ETCRAH = H'00
Release bus
ETCRAH = ETCRAL
MARB = MARB ÐÊETCRAL
ETCRB = ETCRB ÐÊ1
ETCRB = H'0000
Clear DTE to 0 and end transfer
a. DTSZ = TMS = 0
SAID = DAID = 0
SAIDE = DAIDE = 1
Figure 7.11 Block Transfer Mode Flowcharts (Examples)
Rev. 4.00 Jan 26, 2006 page 246 of 938
REJ09B0276-0400
No
Yes
No
Yes
No
Yes
Start
(DTE = DTME = 1)
Transfer requested?
Yes
Get bus
Read from MARA address
MARA = MARA + 1
Write to MARB address
ETCRAH = ETCRAH ÐÊ1
ETCRAH = H'00
Yes
Release bus
ETCRAH = ETCRAL
ETCRB = ETCRB ÐÊ1
ETCRB = H'0000
Yes
Clear DTE to 0 and end transfer
b. DTSZ = TMS = 0
SAID = 0
SAIDE = 1
DAIDE = 0
No
No
No