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Section 11 Programmable Timing Pattern Controller (TPC)
Bits 7 and 6—Group 3 Compare Match Select 1 and 0 (G3CMS1, G3CMS0): These bits
select the compare match event that triggers TPC output group 3 (TP
Bit 7
Bit 6
G3CMS1
G3CMS0
0
0
1
1
0
1
Bits 5 and 4—Group 2 Compare Match Select 1 and 0 (G2CMS1, G2CMS0): These bits
select the compare match event that triggers TPC output group 2 (TP
Bit 5
Bit 4
G2CMS1
G2CMS0
0
0
1
1
0
1
Rev. 4.00 Jan 26, 2006 page 448 of 938
REJ09B0276-0400
Description
TPC output group 3 (TP
timer channel 0
TPC output group 3 (TP
timer channel 1
TPC output group 3 (TP
timer channel 2
TPC output group 3 (TP
compare match in 16-bit timer channel 2
Description
TPC output group 2 (TP
timer channel 0
TPC output group 2 (TP
timer channel 1
TPC output group 2 (TP
timer channel 2
TPC output group 2 (TP
compare match in 16-bit timer channel 2
to TP
15
to TP
) is triggered by compare match in 16-bit
15
12
to TP
) is triggered by compare match in 16-bit
15
12
to TP
) is triggered by compare match in 16-bit
15
12
to TP
) is triggered by
15
12
to TP
11
to TP
) is triggered by compare match in 16-bit
11
8
to TP
) is triggered by compare match in 16-bit
11
8
to TP
) is triggered by compare match in 16-bit
11
8
to TP
) is triggered by
11
8
).
12
(Initial value)
).
8
(Initial value)
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