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Section 8 I/O Ports
8.3.2
Register Descriptions
Table 8.3 summarizes the registers of port 2.
Table 8.3
Port 2 Registers
Address*
Name
H'EE001
Port 2 data direction register
H'FFFD1
Port 2 data register
H'EE03C
Port 2 input pull-up MOS control
register
Note: * Lower 20 bits of the address in advanced mode.
Port 2 Data Direction Register (P2DDR): P2DDR is an 8-bit write-only register that can select
input or output for each pin in port 2.
Bit
P2 DDR
Initial value
Modes
1 to 4
Read/Write
Initial value
Modes
5 to 7
Read/Write
Modes 1 to 4 (Expanded Modes with On-Chip ROM Disabled): P2DDR values are fixed at 1.
Port 2 functions as an address bus.
Modes 5 (Expanded Modes with On-Chip ROM Enabled): Following a reset, port 2 is an input
port. A pin in port 2 becomes an address output pin if the corresponding P2DDR bit is set to 1, and
a generic input port if this bit is cleared to 0.
Mode 6 and 7 (Single-Chip Mode): Port 2 functions as an input/output port. A pin in port 2
becomes an output port if the corresponding P2DDR bit is set to 1, and an input port if this bit is
cleared to 0.
Rev. 4.00 Jan 26, 2006 page 276 of 938
REJ09B0276-0400
7
6
5
P2 DDR
P2 DDR
7
6
5
1
1
1
0
0
0
W
W
W
Abbreviation R/W Modes 1 to 4 Modes 5 to 7
P2DDR
W
P2DR
R/W H'00
P2PCR
R/W H'00
4
3
P2 DDR
P2 DDR
4
3
1
1
0
0
W
W
Port 2 data direction 7 to 0
These bits select input or
output for port 2 pins
Initial Value
H'FF
H'00
H'00
H'00
2
1
P2 DDR
P2 DDR
P2 DDR
2
1
1
1
0
0
W
W
0
0
1
0
W
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