Operation With Cascaded Connection - Renesas H8/3067 Series User Manual

Renesas 16-bit single-chip microcomputer
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φ
TCNT
TCORB
Input capture signal
CMFB
Figure 10.15 CMFB Flag Setting Timing when Input Capture Occurs
Timing of Overflow Flag (OVF) Setting: The OVF flag in TCSR is set to 1 by the overflow
signal generated when TCNT overflows (from H'FF to H'00). Figure 10.16 shows the timing in
this case.
φ
TCNT
Overflow signal
OVF
10.4.5

Operation with Cascaded Connection

If bits CKS2 to CKS0 are set to B'100 in either TCR0 or TCR1, the 8-bit timers of channels 0 and
1 are cascaded. With this configuration, the two timers can be used as a single 16-bit timer (16-bit
count mode), or channel 0 8-bit timer compare matches can be counted in channel 1 (compare
match count mode). In this case, the timer operates as below. Similarly, if bits CKS2 to CKS0 are
set to B'100 in either TCR2 or TCR3, the 8-bit timers of channels 0 and 1 are cascaded. With this
configuration, the two timers can be used as a single 16-bit timer (16-bit count mode),or channel 2
8-bit timer compare matches can be counted in channel 3 (compare match count mode). Timer
operation in these cases is described below.
H'FF
Figure 10.16 Timing of OVF Setting
Section 10 8-Bit Timers
N
N
H'00
Rev. 4.00 Jan 26, 2006 page 419 of 938
REJ09B0276-0400

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