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Bit 6—Address 22 Enable (A22E): Enables PA
0 in this bit enables A
modified and PA
has its ordinary port functions.
5
Bit 6
A22E
Description
0
PA
1
PA
Bit 5—Address 21 Enable (A21E): Enables PA
0 in this bit enables A
modified and PA
has its ordinary port functions.
6
Bit 5
A21E
Description
0
PA
1
PA
Bit 4—Address 20 Enable (A20E): Enables PA
0 in this bit enables A
Bit 4
A20E
Description
0
PA
1
PA
Bits 3 to 1—Reserved: These bits cannot be modified and are always read as 1.
Bit 0—Bus Release Enable (BRLE): Enables or disables release of the bus to an external device.
Bit 0
BRLE
Description
0
The bus cannot be released to an external device
BREQ and BACK can be used as input/output pins
1
The bus can be released to an external device
output from PA
. In modes other than 3, 4, and 5, this bit cannot be
22
5
is the A
address output pin
5
22
is an input/output pin
5
output from PA
. In modes other than 3, 4, and 5, this bit cannot be
21
6
is the A
address output pin
6
21
is an input/output pin
6
output from PA
. This bit can only be modified in mode 5.
20
7
is the A
address output pin (Initial value when in mode 3 or 4)
7
20
is an input/output pin (Initial value when in mode 1, 2, 5, 6 or 7)
7
to be used as the A
5
22
to be used as the A
6
21
to be used as the A
7
20
Rev. 4.00 Jan 26, 2006 page 131 of 938
Section 6 Bus Controller
address output pin. Writing
(Initial value)
address output pin. Writing
(Initial value)
address output pin. Writing
(Initial value)
REJ09B0276-0400
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