Table of Contents
Advertisement
TDR—Transmit Data Register
7
Bit
Initial value
1
Read/Write
R/W
Note: Bit functions are the same as for SCI0.
SSR—Serial Status Register
7
Bit
TDRE
Initial value
0
Read/Write
R/(W)*
Note: Bit functions are the same as for SCI0.
* Only 0 can be written, to clear the flag.
RDR—Receive Data Register
7
Bit
Initial value
0
Read/Write
R
Note: Bit functions are the same as for SCI0.
6
5
1
1
R/W
R/W
6
5
RDRF
ORER
FER/ERS
0
0
R/(W)*
R/(W)*
R/(W)*
6
5
0
0
R
R
Appendix B Internal I/O Registers
H'FFFBB
4
3
1
1
R/W
R/W
R/W
H'FFFBC
4
3
PER
TEND
0
0
R/(W)*
H'FFFBD
4
3
0
0
R
R
Rev. 4.00 Jan 26, 2006 page 869 of 938
SCI1
2
1
0
1
1
1
R/W
R/W
SCI1
2
1
0
MPB
MPBT
1
0
0
R
R
R/W
SCI1
2
1
0
0
0
0
R
R
R
REJ09B0276-0400
Advertisement
Table of Contents
