Renesas H8/3067 Series User Manual page 800

Renesas 16-bit single-chip microcomputer
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Appendix A Instruction Set
Instruction Mnemonic
DEC
DEC.B Rd
DEC.W #1/2, Rd
DEC.L #1/2, ERd
DIVXS
DIVXS.B Rs, Rd
DIVXS.W Rs, ERd
DIVXU
DIVXU.B Rs, Rd
DIVXU.W Rs, ERd
EEPMOV EEPMOV.B
EEPMOV.W
EXTS
EXTS.W Rd
EXTS.L ERd
EXTU
EXTU.W Rd
EXTU.L ERd
INC
INC.B Rd
INC.W #1/2, Rd
INC.L #1/2, ERd
JMP
JMP @ERn
JMP @aa:24
JMP @@aa:8 Normal
JSR
JSR @ERn
JSR @aa:24 Normal
JSR @@aa:8 Normal
LDC
LDC #xx:8, CCR
LDC Rs, CCR
LDC @ERs, CCR
LDC @(d:16, ERs), CCR
LDC @(d:24, ERs), CCR
LDC @ERs+, CCR
LDC @aa:16, CCR
LDC @aa:24, CCR
Rev. 4.00 Jan 26, 2006 page 776 of 938
REJ09B0276-0400
Instruction
Fetch
I
1
1
1
2
2
1
1
2
2
1
1
1
1
1
1
1
2
2
2
Advanced 2
Normal
2
Advanced 2
2
Advanced 2
2
Advanced 2
1
1
2
3
5
2
3
4
Branch
Stack
Addr. Read
Operation
J
K
1
2
1
2
1
2
1
1
2
2
Byte Data
Word Data
Internal
Access
Access
Operation
L
M
N
12
20
12
20
2n + 2 *
1
2n + 2 *
1
2
2
2
2
2
1
1
1
1
2
1
1

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