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Section 9 16-Bit Timer
Bit 0—Overflow Flag 0 (OVF0): This status flag indicates TCNT0 overflow.
Bit 0
OVF0
Description
0
[Clearing condition]
Read OVF0 when OVF0 =1, then write 0 in OVF0.
1
[Setting condition]
TCNT0 overflowed from H'FFFF to H'0000.
9.2.7
Timer Counters (TCNT)
TCNT is a 16-bit counter. The 16-bit timer has three TCNTs, one for each channel.
Channel
Abbreviation
0
TCNT0
1
TCNT1
2
TCNT2
Bit
15
Initial value
0
Read/Write
R/W
Each TCNT is a 16-bit readable/writable register that counts pulse inputs from a clock source. The
clock source is selected by bits TPSC2 to TPSC0 in TCR.
TCNT0 and TCNT1 are up-counters. TCNT2 is an up/down-counter in phase counting mode and
an up-counter in other modes.
TCNT can be cleared to H'0000 by compare match with GRA or GRB or by input capture to GRA
or GRB (counter clearing function).
When TCNT overflows (changes from H'FFFF to H'0000), the OVF flag is set to 1 in TISRC of
the corresponding channel.
When TCNT underflows (changes from H'0000 to H'FFFF), the OVF flag is set to 1 in TISRC of
the corresponding channel.
Rev. 4.00 Jan 26, 2006 page 350 of 938
REJ09B0276-0400
Function
Up-counter
Phase counting mode: up/down-counter
Other modes: up-counter
14
13
12
11
10
0
0
0
0
R/W
R/W
R/W
R/W
R/W
9
8
7
6
0
0
0
0
0
R/W
R/W
R/W
R/W
(Initial value)
5
4
3
2
0
0
0
0
R/W
R/W
R/W
R/W
R/W
1
0
0
0
R/W
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