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Appendix A Instruction Set
Mnemonic
MOV.W @aa:24, Rd
MOV.W Rs, @ERd
MOV.W Rs, @(d:16,
ERd)
MOV.W Rs, @(d:24,
ERd)
MOV.W Rs, @–ERd
MOV.W Rs, @aa:16
MOV.W Rs, @aa:24
MOV.L #xx:32, Rd
MOV.L ERs, ERd
MOV.L @ERs, ERd
MOV.L @(d:16, ERs),
ERd
MOV.L @(d:24, ERs),
ERd
MOV.L @ERs+, ERd
MOV.L @aa:16, ERd
MOV.L @aa:24, ERd
MOV.L ERs, @ERd
MOV.L ERs, @(d:16,
ERd)
MOV.L ERs, @(d:24,
ERd)
MOV.L ERs, @–ERd
MOV.L ERs, @aa:16
MOV.L ERs, @aa:24
POP.W Rn
POP.L ERn
Rev. 4.00 Jan 26, 2006 page 756 of 938
REJ09B0276-0400
Addressing Mode and
Instruction Length (bytes)
W
6
W
2
W
4
W
8
W
2
W
4
W
6
L
6
L
2
L
4
L
6
L
10
L
4
L
6
L
8
L
4
L
6
L
10
L
4
L
6
L
8
W
L
Operation
@aa:24 → Rd16
Rs16 → @ERd
Rs16 → @(d:16, ERd)
Rs16 → @(d:24, ERd)
ERd32–2 → ERd32
Rs16 → @ERd
Rs16 → @aa:16
Rs16 → @aa:24
#xx:32 → Rd32
ERs32 → ERd32
@ERs → ERd32
@(d:16, ERs) → ERd32
@(d:24, ERs) → ERd32
@ERs → ERd32
ERs32+4 → ERs32
@aa:16 → ERd32
@aa:24 → ERd32
ERs32 → @ERd
ERs32 → @(d:16, ERd)
ERs32 → @(d:24, ERd)
ERd32–4 → ERd32
ERs32 → @ERd
ERs32 → @aa:16
ERs32 → @aa:24
@SP → Rn16
2
SP+2 → SP
@SP → ERn32
4
SP+4 → SP
No. of
States*
Condition Code
I
H N Z
V C
0
8
0
4
0
6
0
10
0
6
0
6
0
8
0
6
0
2
0
8
0
10
0
14
0
10
0
10
0
12
0
8
0
10
0
14
0
10
0
10
0
12
0
6
0
10
1
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