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Figure 13.8 shows an example of SCI receive operation in asynchronous mode.
Start
1
bit
D0
0
RDRF
FER
13.3.3
Multiprocessor Communication
The multiprocessor communication function enables several processors to share a single serial
communication line. The processors communicate in asynchronous mode using a format with an
additional multiprocessor bit (multiprocessor format).
In multiprocessor communication, each receiving processor is addressed by an ID. A serial
communication cycle consists of an ID-sending cycle that identifies the receiving processor, and a
data-sending cycle. The multiprocessor bit distinguishes ID-sending cycles from data-sending
cycles.
The transmitting processor stars by sending the ID of the receiving processor with which it wants
to communicate as data with the multiprocessor bit set to 1. Next the transmitting processor sends
transmit data with the multiprocessor bit cleared to 0.
Receiving processors skip incoming data until they receive data with the multiprocessor bit set to
1. When they receive data with the multiprocessor bit set to 1, receiving processors compare the
data with their IDs. Processors with IDs not matching the received data skip further incoming data
until they again receive data with the multiprocessor bit set to 1. Multiple processors can send and
receive data in this way.
Figure 13.9 shows an example of communication among different processors using a
multiprocessor format.
Parity
Data
bit
D1
D7
0/1
RXI request
1 frame
Figure 13.8 Example of SCI Receive Operation
(8-Bit Data with Parity and One Stop Bit)
Section 13 Serial Communication Interface
Stop
Start
bit
bit
1
0
D0
D1
RXI interrupt handler
reads data in RDR and
clears RDRF flag to 0
Rev. 4.00 Jan 26, 2006 page 519 of 938
Stop
Parity
Stop
Data
bit
bit
bit
D7
0/1
1
Idle (mark) state
Framing error,
ERI request
REJ09B0276-0400
1
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