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TCNT value
GR
H'0000
STR bit
IMF
• TCNT count timing
Internal clock source
Bits TPSC2 to TPSC0 in TCR select the system clock (φ) or one of three internal clock
sources obtained by prescaling the system clock (φ/2, φ/4, φ/8).
Figure 9.15 shows the timing.
φ
Internal
clock
TCNT input
N − 1
TCNT
Figure 9.15 Count Timing for Internal Clock Sources
External clock source
Bits TPSC2 to TPSC0 in TCR select an external clock input pin (TCLKA to TCLKD), and
its valid edge or edges are selected by bits CKEG1 and CKEG0. The rising edge, falling
edge, or both edges can be selected.
The pulse width of the external clock signal must be at least 1.5 system clocks when a
single edge is selected, and at least 2.5 system clocks when both edges are selected. Shorter
pulses will not be counted correctly.
Figure 9.16 shows the timing when both edges are detected.
Figure 9.14 Periodic Counter Operation
Section 9 16-Bit Timer
Counter cleared by general
register compare match
N
Rev. 4.00 Jan 26, 2006 page 365 of 938
Time
N + 1
REJ09B0276-0400
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