Renesas H8/3067 Series User Manual page 586

Renesas 16-bit single-chip microcomputer
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Section 14 Smart Card Interface
6. To end reception, clear the RE bit to 0.
No
No
Figure 14.8 Sample Reception Processing Flowchart
The above procedure may include interrupt handling and DMA transfer.
If reception ends and the RDRF flag is set to 1 while the RIE bit is set to 1 and interrupt requests
are enabled, a receive-data-full interrupt (RXI) will be requested. If an error occurs in reception
and either the ORER flag or the PER flag is set to 1, a transmit/receive-error interrupt (ERI) will
be requested.
If the RXI interrupt activates the DMAC, the number of bytes designated in the DMAC will be
transferred, skipping receive data in which an error occurred.
For details, see Interrupt Operations and Data Transfer by DMAC in this section.
Rev. 4.00 Jan 26, 2006 page 562 of 938
REJ09B0276-0400
Start
Initialization
Start receiving
ORER = 0
and PER = 0?
Yes
RDRF = 1?
Yes
Read RDR and clear
RDRF flag to 0 in SSR
All data received?
Yes
Clear RE bit to 0
No
Error handling

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