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18.3.3
RAM Control Register (RAMCR)
RAMCR selects the RAM area used when emulating real-time reprogramming of the flash
memory.
Bit
Modes 1
Initial value
to 4
R/W
Modes 5
Initial value
to 7
R/W
Note: Cannot be set to 1 in mode 6.
Bits 7 to 4—Reserved: These bits cannot be modified and are always read as 1.
Bit 3—RAM Select (RAMS): Is used with bits 2 to 1 to reassign an area to RAM (see table 18.5).
The initial setting for this bit is 0 in Modes 5, 6, and 7 (internal flash memory enabled) and
programming is enabled.* In modes other than 5 to 7, 0 is always read and writing is disabled.
It is initialized by a reset and in hardware standby mode. It is not initialized in software standby
mode.
When bit 3 is set, all flash-memory blocks are protected from programming and erasing.
Bits 2 to 1—RAM2 to RAM1: These bits are used with bit 3 to reassign an area to RAM (see
table 18.5). The initial setting for this bit is 0 in Modes 5, 6, and 7 (internal flash memory enabled)
and programming is enabled.* In modes other than 5 to 7, 0 is always read and writing is disabled.
They are initialized by a reset and in hardware standby mode. They are not initialized in software
standby mode.
7
6
5
1
1
1
1
1
1
Reserved bits
4
3
2
RAMS
RAM2
1
0
0
R
R
1
0
0
R/W*
R/W*
RAM2/1
This bit is used with
bit 3 to set the RAM
area.
RAM select
This bit is used with
bits 2 and 1 to set
the RAM area.
Rev. 4.00 Jan 26, 2006 page 617 of 938
Section 18 ROM
1
0
RAM1
0
1
R
0
1
R/W*
Reserved bit
REJ09B0276-0400
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