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Section 18 ROM
Bit 0—Reserved: This bit cannot be modified and is always read as 1.
Note: * Flash memory emulation by RAM is not supported for Mode 6 (single chip normal mode),
so programming is possible, but do not set 1.
When performing flash memory emulation by RAM, the RAME bit in SYSCR must be set
to 1.
Table 18.5 RAM Area Reassignment
RAM Area
H'FFF000 to H'FFF3FF
H'000000 to H'0003FF
H'000400 to H'0007FF
H'000800 to H'000BFF
H'000C00 to H'000FFF
H'000000
H'0003FF
H'000400
ROM block
H'0007FF
EB0−EB3
H'000800
(H'000000−H'000FFF)
H'000BFF
H'000C00
H'000FFF
Figure 18.2 Example of Overlap ROM Area and RAM Area
Rev. 4.00 Jan 26, 2006 page 618 of 938
REJ09B0276-0400
Bit 3
Bit 2
RAMS
RAM2
0
0/1
1
0
1
0
1
1
1
1
ROM area
EB0
ROM
selection
EB1
area
Mapping RAM
RAM
EB2
selection
area
EB3
Bit 1
RAM
RAM1
Emulation State
0/1
No emulation
0
Mapping RAM
1
0
1
RAM area
H'FFEF20
H'FFEFFF
H'FFF000
Real RAM
H'FFF3FF
H'FFF400
H'FFFF1F
RAM overlap area
(H'FFF000−H'FFF3FF)
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