10.7.7
Contention between TCNT Byte Write and Increment in 16-Bit Count Mode
(Cascaded Connection)
If an increment pulse occurs in the T
writing takes priority and TCNT is not incremented. The TCNT byte that was not written retains
its previous value. Figure 10.24 shows the timing when an increment pulse occurs in the T
of a byte write to TCNTH.
Address bus
Internal write signal
TCNT input clock
TCNTH
TCNTL
Figure 10.24 Contention between TCNT Byte Write and Increment in 16-Bit Count Mode
or T
state of a TCNT byte write cycle in 16-bit count mode,
2
3
TCNTH byte write cycle
T
1
φ
T
2
TCNTH address
N
X
Rev. 4.00 Jan 26, 2006 page 431 of 938
Section 10 8-Bit Timers
T
3
TCNT write data
X+1
REJ09B0276-0400
state
2