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12.1.4
Register Configuration
Table 12.2 summarizes the WDT registers.
Table 12.2 WDT Registers
Address *
1
Write *
2
Read
Name
H'FFF8C H'FFF8C Timer control/status register
H'FFF8D Timer counter
H'FFF8E H'FFF8F Reset control/status register
Notes: 1. Lower 20 bits of the address in advanced mode.
2. Write word data starting at this address.
3. Only 0 can be written in bit 7, to clear the flag.
Section 12 Watchdog Timer
Abbreviation
R/W
R/(W) *
TCSR
TCNT
R/W
R/(W) *
RSTCSR
Rev. 4.00 Jan 26, 2006 page 463 of 938
Initial Value
3
H'18
H'00
3
H'3F
REJ09B0276-0400
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