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12.1
Overview
The H8/3067 has an on-chip watchdog timer (WDT). The WDT has two selectable functions: it
can operate as a watchdog timer to supervise system operation, or it can operate as an interval
timer. As a watchdog timer, it generates a reset signal for the H8/3067 chip if a system crash
allows the timer counter (TCNT) to overflow before being rewritten. In interval timer operation,
an interval timer interrupt is requested at each TCNT overflow.
12.1.1
Features
WDT features are listed below.
• Selection of eight counter clock sources
φ/2, φ /32, φ /64, φ /128, φ /256, φ /512, φ /2048, or φ /4096
• Interval timer option
• Timer counter overflow generates a reset signal or interrupt.
The reset signal is generated in watchdog timer operation. An interval timer interrupt is
generated in interval timer operation.
• Watchdog timer reset signal resets the entire H8/3067 internally, and can also be output
externally.
The reset signal generated by timer counter overflow during watchdog timer operation resets
the entire H8/3067 internally. An external reset signal can be output from the RESO pin to
reset other system devices simultaneously. This function is not provided in the flash memory
and flash memory R versions.
Section 12 Watchdog Timer
Section 12 Watchdog Timer
Rev. 4.00 Jan 26, 2006 page 461 of 938
REJ09B0276-0400
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