On-chip data bus
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CPU
L
Figure 9.9 Access to Timer Counter (CPU Reads TCNT, Lower Byte)
9.3.2
8-Bit Accessible Registers
The registers other than the timer counters, general registers, and buffer registers are 8-bit
registers. These registers are linked to the CPU by an internal 8-bit data bus.
Figures 9.10 and 9.11 show examples of byte read and write access to a TCR.
If a word-size data transfer instruction is executed, two byte transfers are performed.
On-chip data bus
H
CPU
L
Bus interface
Bus interface
Figure 9.10 TCR Access (CPU Writes to TCR)
Section 9 16-Bit Timer
TCNTH
TCNTL
TCR
Rev. 4.00 Jan 26, 2006 page 361 of 938
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Module
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data bus
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Module
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data bus
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