Trap Instruction - Renesas H8/3067 Series User Manual

Section 4 Exception Handling
4.4

Trap Instruction

Trap instruction exception handling starts when a TRAPA instruction is executed. If the UE bit is
set to 1 in the system control register (SYSCR), the exception handling sequence sets the I bit to 1
in CCR. If the UE bit is 0, the I and UI bits are both set to 1. The TRAPA instruction fetches a
start address from a vector table entry corresponding to a vector number from 0 to 3, which is
specified in the instruction code.
Rev. 4.00 Jan 26, 2006 page 87 of 938
REJ09B0276-0400