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Interrupt Source
Origin
ERI0
SCI
(receive error 0)
channel 0
RXI0 (receive
data full 0)
TXI0 (transmit
data empty 0)
TEI0
(transmit end 0)
ERI1
SCI
(receive error 1)
channel 1
RXI1 (receive
data full 1)
TXI1 (transmit
data empty 1)
TEI1 (transmit
end 1)
ERI2
SCI
(receive error 2)
channel 2
RXI2 (receive
data full 2)
TXI2 (transmit
data empty 2)
TEI2 (transmit
end 2)
Note: * Lower 16 bits of the address.
Vector Address*
Vector
Number Advanced Mode Normal Mode
52
H'00D0 to H'00D3
53
H'00D4 to H'00D7
54
H'00D8 to H'00DB
55
H'00DC to H'00DF
56
H'00E0 to H'00E3
57
H'00E4 to H'00E7
58
H'00E8 to H'00EB
59
H'00EC to H'00EF
60
H'00F0 to H'00F3
61
H'00F4 to H'00F7
62
H'00F8 to H'00FB
63
H'00FC to H'00FF
Section 5 Interrupt Controller
H'0068 to H'0069
H'006A to H'006B
H'006C to H'006D
H'006E to H'006F
H'0070 to H'0071
H'0072 to H'0073
H'0074 to H'0075
H'0076 to H'0077
H'0078 to H'0079
H'007A to H'007B
H'007C to H'007D
H'007E to H'007F
Rev. 4.00 Jan 26, 2006 page 109 of 938
IPR
Priority
IPRB3
High
IPRB2
IPRB1
Low
REJ09B0276-0400
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