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TCSR—Timer Control/Status Register
7
Bit
OVF
Initial value
0
Read/Write
R/(W)*
Overflow flag
[Clearing condition]
0
Read OVF when OVF = 1, then write 0 in OVF
[Setting condition]
1
TCNT changes from H'FF to H'00
Note: * Only 0 can be written, to clear the flag.
6
5
WT/IT
TME
0
0
R/W
R/W
Timer enable
Timer disabled
• TCNT is initialized to H'00 and
0
halted
Timer enabled
1
• TCNT is counting
Timer mode select
Interval timer:
0
requests interval timer interrupts
Watchdog timer:
1
generates a reset signal
Appendix B Internal I/O Registers
H'FFF8C
4
3
2
CKS2
1
1
0
R/W
Clock select 2 to 0
CKS2 CKS1 CKS0
0
1
Rev. 4.00 Jan 26, 2006 page 849 of 938
WDT
1
0
CKS1
CKS0
0
0
R/W
R/W
Description
φ/2
0
0
φ/32
1
φ/64
0
1
φ/128
1
φ/256
0
0
φ/512
1
φ/2048
0
1
φ/4096
1
REJ09B0276-0400
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