Table of Contents
Advertisement
Section 9 16-Bit Timer
Block Diagram of Channel 2: Figure 9.3 is a block diagram of channel 2
TCLKA to TCLKD
φ, φ/2, φ/4, φ/8
Legend
TCNT2:
Timer counter 2 (16 bits)
GRA2, GRB2:
General registers A2 and B2 (input capture/output compare registers)
(16 bits
TCR2:
Timer control register 2 (8 bits)
TIOR2:
Timer I/O control register 2 (8 bits)
Rev. 4.00 Jan 26, 2006 page 332 of 938
REJ09B0276-0400
Clock selector
Comparator
×
2)
Figure 9.3 Block Diagram of Channel 2
Control logic
Module data bus
TIOCA
2
TIOCB
2
IMIA2
IMIB2
OVI2
Advertisement
Table of Contents
