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8.7
Port 6
8.7.1
Overview
Port 6 is an 8-bit input/output port that is also used for input and output of bus control signals
(LWR, HWR, RD, AS, BACK, BREQ, WAIT) and for clock (φ) output.
In modes 1 to 5 (expanded modes), the pin functions are P6
AS, P6
/BACK, P6
/BREQ, and P6
2
1
In modes 6 and 7 (single-chip modes), P6
P6
function as generic input/output ports.
0
When DRAM is connected to areas 2 to 5, LWR, HWR, and RD also function as LCAS, UCAS,
and WE, respectively. For details see section 6.5, DRAM Interface.
Pins in port 6 can drive one TTL load and a 90-pF capacitive load. They can also drive a
darlington transistor pair.
Port 6
/WAIT). See table 8.11 for the selection of the pin functions.
0
functions as a generic input port or ø output, and P6
7
Port 6 pins
Modes 1 to 5
(expanded modes)
φ
P6 /
7
LWR
P6 /
6
HWR
P6 /
5
RD
P6 /
4
AS
P6 /
3
BACK
P6 /
P6
(input/output)
2
2
BREQ
P6 /
P6
(input/output)/
1
1
WAIT
P6 /
P6
(input/output)/
0
0
Figure 8.6 Port 6 Pin Configuration
(generic input)/φ, LWR, HWR, RD,
7
φ
(output)
P6
(input)/
7
LWR
(output)
HWR
(output)
RD
(output)
AS
(output)
BACK
(output)
BREQ
(input)
WAIT
(input)
Rev. 4.00 Jan 26, 2006 page 289 of 938
Section 8 I/O Ports
to
6
Mode 6 and 7
(single-chip mode)
(input) / φ(output)
P6
7
P6
(input/output)
6
P6
(input/output)
5
P6
(input/output)
4
P6
(input/output)
3
P6
(input/output)
2
P6
(input/output)
1
P6
(input/output)
0
REJ09B0276-0400
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