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11.4
Usage Notes
11.4.1
Operation of TPC Output Pins
TP
to TP
are multiplexed with 16-bit timer, DMAC, address bus, and other pin functions. When
0
15
16-bit timer, DMAC, or address output is enabled, the corresponding pins cannot be used for TPC
output. The data transfer from NDR bits to DR bits takes place, however, regardless of the usage
of the pin.
Pin functions should be changed only under conditions in which the output trigger event will not
occur.
11.4.2
Note on Non-Overlapping Output
During non-overlapping operation, the transfer of NDR bit values to DR bits takes place as
follows.
1. NDR bits are always transferred to DR bits at compare match A.
2. At compare match B, NDR bits are transferred only if their value is 0. Bits are not transferred
if their value is 1.
Figure 11.9 illustrates the non-overlapping TPC output operation.
TPC output pin
Section 11 Programmable Timing Pattern Controller (TPC)
DDR
NDER
Q
Q
Q
DR
Figure 11.9 Non-Overlapping TPC Output
Compare match A
Compare match B
C
D
Rev. 4.00 Jan 26, 2006 page 459 of 938
Q
NDR
D
REJ09B0276-0400
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