Table of Contents
Advertisement
Section 18 ROM
Notes on use of the RAM emulation function
(1) Notes on flash write enable (FWE) high/low
Care is necessary to prevent erroneous programming/erasing at FWE=high/low, the same as in
the on-board programming mode. To prevent erroneous programming and erasing due to
program runaway, etc., during FWE application, in particular, the watchdog timer should be
set when the PSU, P, ESU, or E bit is set to 1 in FLMCR, even while the emulation function is
being used. For more information, see section 18.9, Notes on Flash Memory
Programming/Erasing.
(2) NMI input disable conditions
When the P and E bits in FLMCR are set, NMI input is disabled, the same as normal
program/erase even when using the emulation function.
NMI input is cleared when the P and E bits are reset (including watchdog timer reset), in the
standby mode, when a high level is not applied to FWE, and when the SWE bit in FLMCR is 0
in state in which a high level is input to FWE.
Rev. 4.00 Jan 26, 2006 page 644 of 938
REJ09B0276-0400
Advertisement
Table of Contents
