Table of Contents
Advertisement
Section 8 I/O Ports
Port 8 Data Register (P8DR): P8DR is an 8-bit readable/writable register that stores output data
for port 8. When port 8 functions as an output port, the value of this register is output. When a bit
in P8DDR is set to 1, if port 8 is read the value of the corresponding P8DR bit is returned. When a
bit in P8DDR is cleared to 0, if port 8 is read the corresponding pin logic level is read.
Bits 7 to 5 are reserved. They are fixed at 1, and cannot be modified.
Bit
7
Initial value
1
Read/Write
P8DR is initialized to H'E0 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
Rev. 4.00 Jan 26, 2006 page 298 of 938
REJ09B0276-0400
6
5
1
1
Reserved bits
4
3
2
P8
P8
P8
4
3
0
0
0
R/W
R/W
R/W
Port 8 data 4 to 0
These bits store data
for port 8 pins
1
0
P8
P8
2
1
0
0
0
R/W
R/W
Advertisement
Table of Contents
