Selection Of Waiting Time For Exit From Software Standby Mode - Renesas H8/3067 Series User Manual

Renesas 16-bit single-chip microcomputer
Hide thumbs Also See for H8/3067 Series:
Table of Contents

Advertisement

Section 20 Power-Down State
20.4.3

Selection of Waiting Time for Exit from Software Standby Mode

Bits STS2 to STS0 in SYSCR and bits DIV1 and DIV0 in DIVCR should be set as follows.
Crystal Resonator: Set STS2 to STS0, DIV1, and DIV0 so that the waiting time (for the clock to
stabilize) is at least 7 ms. Table 20.3 indicates the waiting times that are selected by STS2 to
STS0, DIV1, and DIV0 settings at various system clock frequencies.
External Clock: Any values may be set.
Rev. 4.00 Jan 26, 2006 page 685 of 938
REJ09B0276-0400

Advertisement

Table of Contents
loading

This manual is also suitable for:

H8/3067H8/3066H8/3065H8/3067rf

Table of Contents