Block Diagram - Renesas H8/3067 Series User Manual

Section 17 RAM
17.1.1

Block Diagram

Figure 17.1 shows a block diagram of the on-chip RAM.
Legend
SYSCR: System control register
Note: * This example is of the H8/3067 operating in mode 7. The lower 20 bits of the address
are shown.
Rev. 4.00 Jan 26, 2006 page 602 of 938
REJ09B0276-0400
On-chip data bus (upper 8 bits)
On-chip data bus (lower 8 bits)
Bus interface
H'FEF20*
H'FEF22*
On-chip RAM
H'FFF1E*
Even addresses
Figure 17.1 RAM Block Diagram
SYSCR
H'FEF21*
H'FEF23*
H'FFF1F*
Odd addresses