Renesas H8/3067 Series User Manual page 261

Table 7.8 Register Functions in Repeat Mode
Register
23
MAR
23 7
All 1s IOAR
7
ETCRH
7
ETCRL
Legend
MAR: Memory address register
IOAR: I/O address register
ETCR: Execute transfer count register
In repeat mode ETCRH is used as the transfer counter while ETCRL holds the initial transfer
count. ETCRH is decremented by 1 at each transfer until it reaches H'00, then is reloaded from
ETCRL. MAR is also restored to its initial value, which is calculated from the DTSZ and DTID
bits in DTCR. Specifically, MAR is restored as follows:
MAR ← MAR – (–1)
ETCRH and ETCRL should be initially set to the same value.
Function
Activated by
SCI 0 Receive-
Data-Full
Interrupt or by
A/D Converter
Conversion- Other
End Interrupt Activation
0 Destination Source
address address
register register
Source Destination
0
address address
register register
Transfer counter
0
0
Initial transfer count
• 2 • ETCRL
DTID DTSZ
Section 7 DMA Controller
Initial Setting
Destination or
source start
address
Source or
destination
address
Number of
transfers
Number of
transfers
Rev. 4.00 Jan 26, 2006 page 237 of 938
Operation
Incremented or
decremented at
each transfer until
ETCRH reaches
H'0000, then
restored to initial
value
Held fixed
Decremented
once per transfer
until H'0000 is
reached, then
reloaded from
ETCRL
Held fixed
REJ09B0276-0400