Serial Control Register (Scr) - Renesas H8/3067 Series User Manual

Section 14 Smart Card Interface
14.2.4

Serial Control Register (SCR)

The function of SCR bits 1 and 0 is modified in smart card interface mode
Bit 7
TIE
Initial value
0
Read/Write
R/W
Bits 7 to 2: These bits operate as in normal serial communication. For details see section 13.2.6,
Serial Control Register (SCR).
Bits 1 and 0—Clock Enable 1 and 0 (CKE1, CKE0): These bits select the SCI clock source and
enable or disable clock output from the SCK pin. In smart card interface mode, it is possible to
specify a fixed high level or fixed low level for the clock output, in addition to the usual switching
between enabling and disabling of the clock output.
Bit 7 Bit 1
GM CKE1
0 0
1
1
Rev. 4.00 Jan 26, 2006 page 550 of 938
REJ09B0276-0400
6 5
RIE TE
0 0
R/W R/W
Bit 0
CKE0 Description
0 Internal clock/SCK pin is I/O port
1 Internal clock/SCK pin is clock output
0 Internal clock/SCK pin is fixed at low output
1 Internal clock/SCK pin is clock output
0 Internal clock/SCK pin is fixed at high output
1 Internal clock/SCK pin is clock output
4 3 2
RE MPIE TEIE
0 0 0
R/W R/W R/W
1 0
CKE1 CKE0
0 0
R/W R/W
(Initial value)