Memory Map In Each Operating Mode; Note On Reserved Areas - Renesas H8/3067 Series User Manual

3.6

Memory Map in Each Operating Mode

Figure 3.1 to 3.3 show a memory maps of the H8/3067, H8/3066, and H8/3065. The address space
is divided into eight areas.
The initial bus mode differs between modes 1 and 2, and also between modes 3 and 4.
The address locations of the on-chip RAM and on-chip registers differ between the 64-kbyte mode
(mode 6), the 1-Mbyte modes (modes 1, 2, and 7), and the 16-Mbyte modes (modes 3, 4, and 5).
The address range specifiable by the CPU in the 8- and 16-bit absolute addressing modes (@aa:8
and @aa:16) also differs.
3.6.1

Note on Reserved Areas

The H8/3067 Group memory map includes reserved areas to which read/write access is prohibited.
Note that normal operation is not guaranteed if the following reserved areas are accessed.
(1) The reserved area in the internal I/O register space
The H8/3067 Group internal I/O register space includes a reserved area to which access is
prohibited. For details see Appendix B, Internal I/O Registers.
(2) Other reserved areas
In mode 5 in the H8/3066 and H8/3065, there is a reserved area in area 0 as shown in figures
3.2 and 3.3.
In modes 1 to 5 in the H8/3065, there is a reserved area in area 7 as shown in figure 3.3.
Section 3 MCU Operating Modes
Rev. 4.00 Jan 26, 2006 page 71 of 938
REJ09B0276-0400