Renesas H8/3067 Series User Manual page 214

Renesas 16-bit single-chip microcomputer
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Section 6 Bus Controller
φ
BREQ
BACK
Address bus
Strobe
Figure 6.36 Bus-Released State and Software Standby Mode
φ
Address
RAS
CAS
Rev. 4.00 Jan 26, 2006 page 190 of 938
REJ09B0276-0400
Oscillation stabilization
time on exit from software
standby mode
Figure 6.37 Self-Refresh Clearing
Software standby mode
CPU internal cycle
(period in which external
bus can be released)
CPU cycle
@SP

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