Renesas H8/3067 Series User Manual page 592

Renesas 16-bit single-chip microcomputer
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Section 14 Smart Card Interface
Frame n
Ds
D0 D1 D2 D3 D4 D5 D6 D7 Dp DE
RDRF
PER
• Retransmission when SCI is in Transmit Mode
Figure 14.13 illustrates retransmission when the SCI is in transmit mode.
6. If an error signal is sent back from the receiving device after transmission of one frame is
completed, the FER/ERS bit is set to 1 in SSR. If the RIE bit in SCR is set to the enable state,
an ERI interrupt is requested. The ERS bit should be cleared to 0 in SSR before the next parity
bit sampling timing.
7. The TEND bit in SSR is not set for the frame for which the error signal was received.
8. If an error signal is not sent back from the receiving device, the ERS flag is not set in SSR.
9. If an error signal is not sent back from the receiving device, transmission of one frame,
including retransmission, is assumed to have been completed, and the TEND bit is set to 1 in
SSR. If the TIE bit in SCR is set to the enable state, a TXI interrupt is requested. If TXI is
enabled as a DMA transfer activation source, the next data can be written in TDR
automatically. When the DMAC writes data in TDR, the TDRE bit is automatically cleared to
0.
Frame n
Ds
D0 D1 D2 D3 D4 D5 D6 D7 Dp DE
TDRE
Transfer from TDR to TSR
TEND
ERS
Figure 14.13 Retransmission in SCI Transmit Mode
Rev. 4.00 Jan 26, 2006 page 568 of 938
REJ09B0276-0400
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
[2]
[1]
Figure 14.12 Retransmission in SCI Receive Mode
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
Transfer from TDR to TSR
[7]
[6]
Retransmitted frame
Retransmitted frame
(DE)
[9]
[8]
Frame n+1
(DE)
Ds D0 D1 D2 D3 D4
[4]
[3]
Frame n+1
Ds D0 D1 D2 D3 D4
Transfer from TDR to TSR

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