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Port 9 Data Register (P9DR): P9DR is an 8-bit readable/writable register that stores output data
for port 9. When port 9 functions as an output port, the value of this register is output. When a bit
in P9DDR is set to 1, if port 9 is read the value of the corresponding P9DR bit is returned. When a
bit in P9DDR is cleared to 0, if port 9 is read the corresponding pin logic level is read.
Bits 7 and 6 are reserved. They are fixed at 1, and cannot be modified.
Bit
7
Initial value
1
Read/Write
Reserved bits
P9DR is initialized to H'C0 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
6
5
4
P9
P9
5
1
0
0
R/W
R/W
3
2
P9
P9
4
3
2
0
0
R/W
R/W
Port 9 data 5 to 0
These bits store data
for port 9 pins
Rev. 4.00 Jan 26, 2006 page 303 of 938
Section 8 I/O Ports
1
0
P9
P9
1
0
0
0
R/W
R/W
REJ09B0276-0400
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